--  BSP.IO -- IO low level definitions
--  Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc.
--  Written by Stephane Carrez (stcarrez@nerim.fr)
--
--  This file is free software; you can redistribute it and/or modify it
--  under the terms of the GNU General Public License as published by the
--  Free Software Foundation; either version 2, or (at your option) any
--  later version.
--
--  In addition to the permissions in the GNU General Public License, the
--  Free Software Foundation gives you unlimited permission to link the
--  compiled version of this file with other programs, and to distribute
--  those programs without any restriction coming from the use of this
--  file.  (The General Public License restrictions do apply in other
--  respects; for example, they cover modification of the file, and
--  distribution when not linked into another program.)
--
--  This file is distributed in the hope that it will be useful, but
--  WITHOUT ANY WARRANTY; without even the implied warranty of
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
--  General Public License for more details.
--
--  You should have received a copy of the GNU General Public License
--  along with this program; see the file COPYING.  If not, write to
--  the Free Software Foundation, 59 Temple Place - Suite 330,
--  Boston, MA 02111-1307, USA.
pragma No_Run_Time;
package BSP.IO is

   type Port_Type is
      (P_PORTA,         --  Port A register
       P_RES1,          --  Unused/Reserved
       P_PIOC,          --  Parallel I/O Control register
       P_PORTC,         --  Port C register
       P_PORTB,         --  Port B register
       P_PORTCL,        --  Alternate latched port C
       P_RES6,          --  Unused/Reserved
       P_DDRC,          --  Data direction register for port C
       P_PORTD,         --  Port D register
       P_DDRD,          --  Data direction register for port D
       P_PORTE,         --  Port E input register
       P_CFORC,         --  Compare Force Register
       P_OC1M,          --  OC1 Action Mask register
       P_OC1D,          --  OC1 Action Data register
       P_TCTN_H,        -- "     "        High part
       P_TCTN_L,        -- "     "        Low part
       P_TIC1_H,        -- "     "        High part
       P_TIC1_L,        -- "     "        Low part
       P_TIC2_H,        -- "     "        High part
       P_TIC2_L,        -- "     "        Low part
       P_TIC3_H,        -- "     "        High part
       P_TIC3_L,        -- "     "        Low part
       P_TOC1_H,        -- "     "        High part
       P_TOC1_L,        -- "     "      --  Low part
       P_TOC2_H,        -- "     "      --  High part
       P_TOC2_L,        -- "     "      --  Low part
       P_TOC3_H,        -- "     "      --  High part
       P_TOC3_L,        -- "     "      --  Low part
       P_TOC4_H,        -- "     "      --  High part
       P_TOC4_L,        -- "     "      --  Low part
       P_TOC5_H,        -- "     "      --  High part
       P_TOC5_L,        -- "     "      --  Low part
       P_TCTL1,         --  Timer Control register 1
       P_TCTL2,         --  Timer Control register 2
       P_TMSK1,         --  Timer Interrupt Mask Register 1
       P_TFLG1,         --  Timer Interrupt Flag Register 1
       P_TMSK2,         --  Timer Interrupt Mask Register 2
       P_TFLG2,         --  Timer Interrupt Flag Register 2
       P_PACTL,         --  Pulse Accumulator Control Register
       P_PACNT,         --  Pulse Accumulator Count Register
       P_SPCR,          --  SPI Control register
       P_SPSR,          --  SPI Status register
       P_SPDR,          --  SPI Data register
       P_BAUD,          --  SCI Baud register
       P_SCCR1,         --  SCI Control register 1
       P_SCCR2,         --  SCI Control register 2
       P_SCSR,          --  SCI Status register
       P_SCDR,          --  SCI Data Read  RDR Write  TDR
       P_ADCTL,         --  AD Control register
       P_ADR1,          --  AD Analog Result register 1
       P_ADR2,          --  AD Analog Result register 2
       P_ADR3,          --  AD Analog Result register 3
       P_ADR4,          --  AD Analog Result register 4
       P_RES35,         --  define M6811__RES36     0x
       P_RES37,         --  define M6811__RES38    0x
       P_OPTION,        --  System Configuration Options
       P_COPRST,        --  ArmReset COP Timer Circuitry
       P_PPROG,         --  EEPROM Programming Control Register
       P_HPRIO,         --  Highest priority I-Bit int and misc
       P_INIT,          --  Ram and I/O mapping register
       P_TEST1,         --  Factory test control register
     P_CONFIG);         --  COP, ROM and EEPROM enables

   --  68HC11 register address offsets (range 0..0x3F or 0..64).
   --  The absolute address of the I/O register depends on the setting
   --  of the M6811_INIT register.  At init time, the I/O registers are
   --  mapped at 0x1000.  Address of registers is then:
   --
   --  0x1000 + M6811_xxx

   for Port_Type use
      (P_PORTA  => 16#00#,      --  Port A register
       P_RES1   => 16#01#,      --  Unused/Reserved
       P_PIOC   => 16#02#,      --  Parallel I/O Control register
       P_PORTC  => 16#03#,      --  Port C register
       P_PORTB  => 16#04#,      --  Port B register
       P_PORTCL => 16#05#,      --  Alternate latched port C
       P_RES6   => 16#06#,      --  Unused/Reserved
       P_DDRC   => 16#07#,      --  Data direction register for port C
       P_PORTD  => 16#08#,      --  Port D register
       P_DDRD   => 16#09#,      --  Data direction register for port D
       P_PORTE  => 16#0A#,      --  Port E input register
       P_CFORC  => 16#0B#,      --  Compare Force Register
       P_OC1M   => 16#0C#,      --  OC1 Action Mask register
       P_OC1D   => 16#0D#,      --  OC1 Action Data register
       P_TCTN_H => 16#0E#,      -- "     "        High part
       P_TCTN_L => 16#0F#,      -- "     "        Low part
       P_TIC1_H => 16#10#,      -- "     "        High part
       P_TIC1_L => 16#11#,      -- "     "        Low part
       P_TIC2_H => 16#12#,      -- "     "        High part
       P_TIC2_L => 16#13#,      -- "     "        Low part
       P_TIC3_H => 16#14#,      -- "     "        High part
       P_TIC3_L => 16#15#,      -- "     "        Low part
       P_TOC1_H => 16#16#,      -- "     "        High part
       P_TOC1_L => 16#17#,      -- "     "      --  Low part
       P_TOC2_H => 16#18#,      -- "     "      --  High part
       P_TOC2_L => 16#19#,      -- "     "      --  Low part
       P_TOC3_H => 16#1A#,      -- "     "      --  High part
       P_TOC3_L => 16#1B#,      -- "     "      --  Low part
       P_TOC4_H => 16#1C#,      -- "     "      --  High part
       P_TOC4_L => 16#1D#,      -- "     "      --  Low part
       P_TOC5_H => 16#1E#,      -- "     "      --  High part
       P_TOC5_L => 16#1F#,      -- "     "      --  Low part
       P_TCTL1  => 16#20#,      --  Timer Control register 1
       P_TCTL2  => 16#21#,      --  Timer Control register 2
       P_TMSK1  => 16#22#,      --  Timer Interrupt Mask Register 1
       P_TFLG1  => 16#23#,      --  Timer Interrupt Flag Register 1
       P_TMSK2  => 16#24#,      --  Timer Interrupt Mask Register 2
       P_TFLG2  => 16#25#,      --  Timer Interrupt Flag Register 2
       P_PACTL  => 16#26#,      --  Pulse Accumulator Control Register
       P_PACNT  => 16#27#,      --  Pulse Accumulator Count Register
       P_SPCR   => 16#28#,      --  SPI Control register
       P_SPSR   => 16#29#,      --  SPI Status register
       P_SPDR   => 16#2A#,      --  SPI Data register
       P_BAUD   => 16#2B#,      --  SCI Baud register
       P_SCCR1  => 16#2C#,      --  SCI Control register 1
       P_SCCR2  => 16#2D#,      --  SCI Control register 2
       P_SCSR   => 16#2E#,      --  SCI Status register
       P_SCDR   => 16#2F#,      --  SCI Data Read  RDR Write  TDR
       P_ADCTL  => 16#30#,      --  AD Control register
       P_ADR1   => 16#31#,      --  AD Analog Result register 1
       P_ADR2   => 16#32#,      --  AD Analog Result register 2
       P_ADR3   => 16#33#,      --  AD Analog Result register 3
       P_ADR4   => 16#34#,      --  AD Analog Result register 4
       P_RES35  => 16#35#,      --  define M6811__RES36     0x
       P_RES37  => 16#37#,      --  define M6811__RES38    0x
       P_OPTION => 16#39#,      --  System Configuration Options
       P_COPRST => 16#3A#,      --  ArmReset COP Timer Circuitry
       P_PPROG  => 16#3B#,      --  EEPROM Programming Control Register
       P_HPRIO  => 16#3C#,      --  Highest priority I-Bit int and misc
       P_INIT   => 16#3D#,      --  Ram and I/O mapping register
       P_TEST1  => 16#3E#,      --  Factory test control register
       P_CONFIG => 16#3F#);     --  COP, ROM and EEPROM enables

   type T_CONFIG is new Byte;

   F_NOSEC : constant T_CONFIG := 16#08#;   --  Security mode disable
   F_NOCOP : constant T_CONFIG := 16#04#;   --  COP system disable
   F_ROMON : constant T_CONFIG := 16#02#;   --  Enable on-chip rom
   F_EEON  : constant T_CONFIG := 16#01#;   --  Enable on-chip eeprom

   --  ---------------------------
   --  Type and flags of the PPROG register.
   --  ---------------------------
   type T_PPROG is new Byte;

   F_BYTE  : constant T_PPROG := 16#10#; --  Byte mode
   F_ROW   : constant T_PPROG := 16#08#; --  Row mode
   F_ERASE : constant T_PPROG := 16#04#; --  Erase mode select (1 = erase)
   F_EELAT : constant T_PPROG := 16#02#; --  EEPROM Latch Control
   F_EEPGM : constant T_PPROG := 16#01#; --  EEPROM Programming Voltage Enable

   --  ---------------------------
   --  Type and flags of the PIOC register.
   --  ---------------------------
   type T_PIOC is new Byte;

   F_STAF : constant T_PIOC := 16#80#; --  Strobe A Interrupt Status Flag
   F_STAI : constant T_PIOC := 16#40#; --  Strobe A Interrupt Enable Mask
   F_CWOM : constant T_PIOC := 16#20#; --  Port C Wire OR mode
   F_HNDS : constant T_PIOC := 16#10#; --  Handshake mode
   F_OIN  : constant T_PIOC := 16#08#; --  Output or Input handshaking
   F_PLS  : constant T_PIOC := 16#04#; --  Pulse/Interlocked Handshake Operation
   F_EGA  : constant T_PIOC := 16#02#; --  Active Edge for Strobe A
   F_INVB : constant T_PIOC := 16#01#; --  Invert Strobe B

   --  ---------------------------
   --  Type and flags of the SCCR1 register.
   --  ---------------------------
   type T_SCCR1 is new Byte;

   F_R8   : constant T_SCCR1 := 16#80#; --  Receive Data bit 8
   F_T8   : constant T_SCCR1 := 16#40#; --  Transmit data bit 8
   F_M    : constant T_SCCR1 := 16#10#; --  SCI Character length
   F_WAKE : constant T_SCCR1 := 16#08#; --  Wake up method select (0=idle)

   --  ---------------------------
   --  Type and flags of the SCCR2 register.
   --  ---------------------------
   type T_SCCR2 is new Byte;

   F_TIE  : constant T_SCCR2 := 16#80#; --  Transmit Interrupt enable
   F_TCIE : constant T_SCCR2 := 16#40#; --  Transmit Complete Interrupt Enable
   F_RIE  : constant T_SCCR2 := 16#20#; --  Receive Interrupt Enable
   F_ILIE : constant T_SCCR2 := 16#10#; --  Idle Line Interrupt Enable
   F_TE   : constant T_SCCR2 := 16#08#; --  Transmit Enable
   F_RE   : constant T_SCCR2 := 16#04#; --  Receive Enable
   F_RWU  : constant T_SCCR2 := 16#02#; --  Receiver Wake Up
   F_SBK  : constant T_SCCR2 := 16#01#; --  Send Break

   --  ---------------------------
   --  Type and flags of the SCSR register.
   --  ---------------------------
   type T_SCSR is new Byte;

   F_TDRE : constant T_SCSR := 16#80#; --  Transmit Data Register Empty
   F_TC   : constant T_SCSR := 16#40#; --  Transmit Complete
   F_RDRF : constant T_SCSR := 16#20#; --  Receive Data Register Full
   F_IDLE : constant T_SCSR := 16#10#; --  Idle Line Detect
   F_OR   : constant T_SCSR := 16#08#; --  Overrun Error
   F_NF   : constant T_SCSR := 16#04#; --  Noise Flag
   F_FE   : constant T_SCSR := 16#02#; --  Framing Error

   --  ---------------------------
   --  Type and flags of the BAUD register.
   --  ---------------------------
   type T_BAUD is new Byte;

   F_TCLR : constant T_BAUD := 16#80#; --  Clear Baud Rate (TEST mode)
   F_SCP1 : constant T_BAUD := 16#20#; --  SCI Baud rate prescaler select
   F_SCP0 : constant T_BAUD := 16#10#;
   F_RCKB : constant T_BAUD := 16#08#; --  Baud Rate Clock Check (TEST mode)
   F_SCR2 : constant T_BAUD := 16#04#; --  SCI Baud rate select
   F_SCR1 : constant T_BAUD := 16#02#;
   F_SCR0 : constant T_BAUD := 16#01#;
   F_BAUD_DIV1 : constant T_BAUD := 0;
   F_BAUD_DIV3 : constant T_BAUD := F_SCP0;
   F_BAUD_DIV4 : constant T_BAUD := F_SCP1;
   F_BAUD_DIV13 : constant T_BAUD := F_SCP1 or F_SCP0;

   type Port is array (Port_Type) of Byte;
   pragma Volatile (Port);

   type Port_Map is record
      PORTA     : Byte;      --  Port A register
      P_RES1    : Byte;      --  Unused/Reserved
      PIOC      : Byte;      --  Parallel I/O Control register
      PORTC     : Byte;      --  Port C register
      PORTB     : Byte;      --  Port B register
      PORTCL    : Byte;      --  Alternate latched port C
      P_RES6    : Byte;      --  Unused/Reserved
      DDRC      : Byte;      --  Data direction register for port C
      PORTD     : Byte;      --  Port D register
      DDRD      : Byte;      --  Data direction register for port D
      PORTE     : Byte;      --  Port E input register
      CFORC     : Byte;      --  Compare Force Register
      OC1M      : Byte;      --  OC1 Action Mask register
      OC1D      : Byte;      --  OC1 Action Data register
      TCTN      : Word;      --  Timer Counter Register
      TIC1      : Word;      --  Input capture 1 register
      TIC2      : Word;      --  Input capture 2 register
      TIC3      : Word;      --  Input capture 3 register
      TOC1      : Word;      --  Output Compare 1 register
      TOC2      : Word;      --  Output Compare 2 register
      TOC3      : Word;      --  Output Compare 3 register
      TOC4      : Word;      --  Output Compare 4 register
      TOC5      : Word;      --  Output Compare 5 register
      TCTL1     : Byte;      --  Timer Control register 1
      TCTL2     : Byte;      --  Timer Control register 2
      TMSK1     : Byte;      --  Timer Interrupt Mask Register 1
      TFLG1     : Byte;      --  Timer Interrupt Flag Register 1
      TMSK2     : Byte;      --  Timer Interrupt Mask Register 2
      TFLG2     : Byte;      --  Timer Interrupt Flag Register 2
      PACTL     : Byte;      --  Pulse Accumulator Control Register
      PACNT     : Byte;      --  Pulse Accumulator Count Register
      SPCR      : Byte;      --  SPI Control register
      SPSR      : Byte;      --  SPI Status register
      SPDR      : Byte;      --  SPI Data register
      BAUD      : T_BAUD;    --  SCI Baud register
      SCCR1     : T_SCCR1;   --  SCI Control register 1
      SCCR2     : T_SCCR2;   --  SCI Control register 2
      SCSR      : T_SCSR;    --  SCI Status register
      SCDR      : Character; --  SCI Data Read  RDR Write  TDR
      ADCTL     : Byte;      --  AD Control register
      ADR1      : Byte;      --  AD Analog Result register 1
      ADR2      : Byte;      --  AD Analog Result register 2
      ADR3      : Byte;      --  AD Analog Result register 3
      ADR4      : Byte;      --  AD Analog Result register 4
      P_RES35   : Byte;      --  define M6811__RES36     0x
      P_RES37   : Byte;      --  define M6811__RES38    0x
      OPTION    : Byte;      --  System Configuration Options
      COPRST    : Byte;      --  ArmReset COP Timer Circuitry
      PPROG     : T_PPROG;   --  EEPROM Programming Control Register
      HPRIO     : Byte;      --  Highest priority I-Bit int and misc
      INIT      : Byte;      --  Ram and I/O mapping register
      TEST1     : Byte;      --  Factory test control register
      CONFIG    : T_CONFIG;  --  COP, ROM and EEPROM enables
      --  pragma Volatile_Components (SCSR);
   end record;
   pragma Volatile (Port_Map);
   pragma Convention (C, Port_Map);

   Ios : Port_Map;

   pragma Import_Object (Ios, "_io_ports");
   --  Address of the IO ports is specified at link time.
   --  This allows compilation of BSP and use of the same BSP library
   --  by different applications (which could map the IO at different places).

   Io_Ports : Port;
   pragma Import (C, Io_Ports, "_io_ports");

end BSP.IO;


You may also see the list of program units.

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